by johno » Mon May 08, 2006 7:16 pm
It all comes down to the processing that needs to be done with the data coming from the camera. A typical loop processing loop would look like the following (executing on the mega8):
start loop
wait for PCLK to go high
sample Y data bus for a red value
sample UV data bus for a green value
wait for PCLK to go low
wait for PCLK to go high
sample UV data bus for a blue value
perform some processing on the sampled data (in the case of the AVRcam, decide if the RGB value is in the color map, and run-length compress the data in the current line)
end loop
All of this processing needs to be done in around 16 clock cycles to keep up with the full-speed image stream from the OV6620. However, just the loop to monitor when PCLK changes state, and loop back to check again if it HAS NOT changed state, can maximally take 3 or 4 clock cycles. As you can see, this would simply eat up too much time.
So the trick here is to use the same clock source for both the mega8 and the OV6620. Thus, I no longer need to sample the PCLK line in between pixel data; I just need to synch up once with it at the beginning of each line. Once the timing is set, I can guarantee that, say, every 6 clock cycles, the data on the data bus will have changed values, and will be ready for sampling, thus eliminating all those cycles checking the state of PCLK. If different, un-synchronized clock rates were used for the mega8 and the OV6620, this wouldn't be possible.
Make sense?
-John O
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